{"id":1980,"date":"2023-09-25T20:32:08","date_gmt":"2023-09-25T12:32:08","guid":{"rendered":"https:\/\/www.huangrongzhen.ink\/?p=1980"},"modified":"2023-09-28T09:51:27","modified_gmt":"2023-09-28T01:51:27","slug":"adc-%e5%ad%a6%e4%b9%a0%e7%ac%94%e8%ae%b0","status":"publish","type":"post","link":"https:\/\/www.huangrongzhen.ink\/?p=1980","title":{"rendered":"ADC \u5b66\u4e60\u7b14\u8bb0"},"content":{"rendered":"<div class=\"wp-block-post-excerpt\"><p class=\"wp-block-post-excerpt__excerpt\">\u8bb0\u5f55 STM32 \u548c GD32 \u4e2d ADC \u7684\u5b66\u4e60\u7b14\u8bb0\u548c\u5fc3\u5f97\u3002\u672c\u6587\u4e2d\u4e3b\u8981\u89e3\u6790 ADC \u7684\u89c4\u5219\u8f6c\u6362\uff0c\u4e0d\u6d89\u53ca\u6ce8\u5165\u8f6c&hellip; <\/p><\/div>\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"%E5%86%99%E5%9C%A8%E5%89%8D%E8%BE%B9%E7%9A%84%E8%AF%9D\"><\/span>\u5199\u5728\u524d\u8fb9\u7684\u8bdd<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>\u672c\u6587\u4e2d\u6240\u6709\u4ee3\u7801\u793a\u4f8b\u5747\u90e8\u7f72\u5728 GD32F303 \u5e73\u53f0\u3002<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"ADC_%E5%80%BC%E4%B8%8E%E7%94%B5%E5%8E%8B%E7%9A%84%E5%85%B3%E7%B3%BB\"><\/span>ADC \u503c\u4e0e\u7535\u538b\u7684\u5173\u7cfb<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>ADC\uff0c\u5373\u6a21\u6570\u8f6c\u6362\uff0c\u662f\u5229\u7528\u6570\u5b57\u91cf\u6765\u8868\u793a\u6a21\u62df\u91cf\u3002ADC \u503c\u4e0e\u6a21\u62df\u91cf\u7684\u5173\u7cfb\u53ef\u4ee5\u7528\u4e0b\u56fe\u6765\u8868\u793a\uff0c\u4ee5 12 \u4f4d ADC \u4e3a\u4f8b\u3002\u8fd9\u91cc\u7684\u201c12 \u4f4d\u201d\u662f\u6307 ADC \u7684\u5206\u8fa8\u7387\u662f 12 \u4f4d\uff0c\u5728 2 \u8fdb\u5236\u4e2d\uff0c12 \u4f4d\u65e0\u7b26\u53f7\u6574\u578b\u7684\u53d6\u503c\u8303\u56f4\u4e3a 0~4095\uff0c\u5373 0~2^12-1\u3002\u5982\u679c ADC \u7684\u5206\u8fa8\u7387\u662f 8\uff0c\u90a3\u4e48 ADC \u503c\u8303\u56f4\u4e3a 0~255\uff0c\u5982\u679c\u662f 16 \u4f4d ADC\uff0c\u90a3\u4e48 ADC \u503c\u8303\u56f4\u5728 0~65535 \u4e4b\u95f4\u3002<\/p>\n\n\n\n<p>\u4f7f\u7528 ADC \u503c\u8868\u8fbe\u7535\u538b\u503c\u7684\u8fc7\u7a0b\u66f4\u50cf\u662f\u7528\u5c3a\u5b50\u4e08\u91cf\uff0c\u6bcf\u4e00\u4e2a ADC \u503c\u90fd\u552f\u4e00\u5bf9\u5e94\u4e00\u4e2a\u7535\u538b\u503c\uff0c\u56e0\u4e3a\u662f\u6bd4\u4f8b\u5173\u7cfb\uff0c\u6240\u4ee5 ADC \u4e0e\u7535\u538b\u503c\u7684\u6362\u7b97\u5173\u7cfb\u4e3a\uff1a\u7535\u538b\u503c=VREF- + (VREF+ &#8211; VREF-) * ADC \/ 4095\u3002\u8fd9\u91cc\u7684 VREF \u5373\u4e3a\u53c2\u8003\u7535\u538b\uff0c\u6709\u6b63\u6709\u8d1f\u3002\u6709\u4e9b\u5355\u7247\u673a\u6bd4\u8f83\u7b80\u5355\uff0c\u4f8b\u5982 GD32F303RCT6\uff0cVREF- \u7b49\u4e8e GND\uff0cVREF+ \u7b49\u4e8e\u4f9b\u7535\u7535\u538b\uff0c\u5982\u679c\u5355\u7247\u673a\u7684\u4f9b\u7535\u7535\u538b\u4e3a 3.3V\uff0c\u90a3\u4e48 ADC \u4e0e\u7535\u538b\u503c\u7684\u6362\u7b97\u5173\u7cfb\u4e3a\uff1a\u7535\u538b\u503c= 3.3 * ADC \/ 4095\u3002\u6709\u4e9b\u5355\u7247\u673a\u4f1a\u6709\u989d\u5916\u7684\u5f15\u811a\u6765\u5355\u72ec\u914d\u7f6e VREF+ \u548c VREF-\uff0c\u5982\u6b64\u4e00\u6765\u7528\u6237\u53ef\u4ee5\u7528\u4e00\u4e2a\u9ad8\u7cbe\u5ea6\u7684\u53c2\u8003\u7535\u538b\u7535\u8def\u6765\u4e3a ADC \u63d0\u4f9b\u53c2\u8003\u7535\u538b\uff0c\u8fd9\u6837\u505a\u53ef\u4ee5\u907f\u514d ADC \u6d4b\u91cf\u6536\u5230\u4f9b\u7535\u7aef\u7684\u5f71\u54cd\u3002<\/p>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-large is-resized\"><img decoding=\"async\" loading=\"lazy\" src=\"http:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/\u7535\u538b\u4e0e-ADC-\u503c\u4e4b\u95f4\u7684\u5173\u7cfb-20230923A-662x1024.png\" alt=\"\" class=\"wp-image-1981\" style=\"width:215px;height:332px\" width=\"215\" height=\"332\" srcset=\"https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/\u7535\u538b\u4e0e-ADC-\u503c\u4e4b\u95f4\u7684\u5173\u7cfb-20230923A-662x1024.png 662w, https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/\u7535\u538b\u4e0e-ADC-\u503c\u4e4b\u95f4\u7684\u5173\u7cfb-20230923A-194x300.png 194w, https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/\u7535\u538b\u4e0e-ADC-\u503c\u4e4b\u95f4\u7684\u5173\u7cfb-20230923A-768x1188.png 768w, https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/\u7535\u538b\u4e0e-ADC-\u503c\u4e4b\u95f4\u7684\u5173\u7cfb-20230923A-993x1536.png 993w, https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/\u7535\u538b\u4e0e-ADC-\u503c\u4e4b\u95f4\u7684\u5173\u7cfb-20230923A-1324x2048.png 1324w, https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/\u7535\u538b\u4e0e-ADC-\u503c\u4e4b\u95f4\u7684\u5173\u7cfb-20230923A.png 1956w\" sizes=\"(max-width: 215px) 100vw, 215px\" \/><\/figure><\/div>\n\n\n<p>\u5b9e\u9645\u9879\u76ee\u4e2d\uff0c\u4ea7\u54c1\u91cc\u53ef\u80fd\u5305\u542b\u7535\u673a\u7b49\u5668\u4ef6\uff0c\u8fd9\u4e9b\u5668\u4ef6\u542f\u52a8\u7684\u4e00\u77ac\u95f4\u4f1a\u6d88\u8017\u5927\u91cf\u7684\u7535\u91cf\uff0c\u9020\u6210\u4f9b\u7535\u7535\u538b\u77ac\u95f4\u8dcc\u843d\u3002\u6b64\u65f6\u5982\u679c VREF+ \u4e0e\u4f9b\u7535\u7535\u538b\u7ed1\u5230\u4e00\u8d77\uff0c\u5c31\u4f1a\u5e72\u6270\u5230 ADC \u8f6c\u6362\u3002\u8fd8\u6709\u4e00\u79cd\u60c5\u51b5\u662f\u7535\u6e90\u90e8\u5206\u8bbe\u8ba1\u4e0d\u597d\uff0c\u566a\u58f0\u5f88\u5927\uff0c\u6b64\u65f6\u6ca1\u6709\u72ec\u7acb\u7684\u53c2\u8003\u7535\u538b\u7684\u8bdd\uff0c\u540c\u6837\u4e5f\u4f1a\u5f71\u54cd\u5230\u5355\u7247\u673a\u7684 ADC \u91c7\u6837\u3002<\/p>\n\n\n\n<p>\u5bf9\u4e8e STM32 \u548c GD32\uff0c ADC \u5206\u8fa8\u7387\u4e00\u822c\u662f 12 \u4f4d\uff0c\u53ef\u4ee5\u914d\u7f6e\u6210 8 \u4f4d\u751a\u81f3\u662f 6 \u4f4d\u3002\u5728 12 \u4f4d\u5206\u8fa8\u7387\u7684\u60c5\u51b5\u4e0b\uff0c\u5047\u5b9a VREF- \u4e3a 0V\uff0cVREF+ \u4e3a 3.3V\uff0c\u90a3\u4e48\u6b64\u65f6 ADC \u6700\u5c0f\u5206\u8fa8\u7535\u538b\u4e3a 3.3V \/ 4095 = 0.8mV\u3002\u8fd9\u5bf9\u4e8e\u5927\u591a\u6570\u9879\u76ee\u662f\u8db3\u591f\u7528\u4e86\uff0c\u5bf9\u4e8e\u4e00\u4e9b\u9ad8\u7cbe\u5ea6\u573a\u5408\uff0c\u53ef\u4ee5\u5916\u6302\u4e00\u4e9b\u9ad8\u7cbe\u5ea6 ADC \u82af\u7247\u3002\u5982\u679c ADC \u82af\u7247\u7684\u5206\u8fa8\u7387\u4e3a 16 \u4f4d\uff0c\u540c\u6837 3.3V \u53c2\u8003\u7535\u538b\u4e0b\uff0c\u6700\u5c0f\u5206\u8fa8\u7535\u538b\u4e3a 3.3V \/ 65535 = 80\u03bcV\uff1b\u5982\u679c\u662f 24 \u4f4d\u5206\u8fa8\u7387\uff0c\u90a3\u4e48\u6700\u5c0f\u5206\u8fa8\u7535\u538b\u751a\u81f3\u80fd\u8fbe\u5230 196.7nV\u3002\u5f53\u7136\uff0cADC \u5206\u8fa8\u7387\u8d8a\u9ad8\uff0c\u4ef7\u683c\u4e5f\u5c31\u8d8a\u8d35\u3002<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"ADC_%E8%A7%A6%E5%8F%91%E6%BA%90\"><\/span>ADC \u89e6\u53d1\u6e90<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>STM32 \u548c GD32 \u7684 ADC \u53ef\u4ee5\u7531\u8f6f\u4ef6\u89e6\u53d1\uff0c\u4e5f\u53ef\u4ee5\u7531\u786c\u4ef6\u5b9a\u65f6\u5668\u89e6\u53d1\u6216\u5916\u90e8\u4e2d\u65ad\u89e6\u53d1\uff0c\u5982\u4e0b\u6240\u793a\u3002<\/p>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img decoding=\"async\" loading=\"lazy\" width=\"820\" height=\"708\" src=\"http:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/ADC-\u7684\u89e6\u53d1\u65b9\u5f0f-20230925A.png\" alt=\"\" class=\"wp-image-1983\" srcset=\"https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/ADC-\u7684\u89e6\u53d1\u65b9\u5f0f-20230925A.png 820w, https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/ADC-\u7684\u89e6\u53d1\u65b9\u5f0f-20230925A-300x259.png 300w, https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/ADC-\u7684\u89e6\u53d1\u65b9\u5f0f-20230925A-768x663.png 768w, https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/ADC-\u7684\u89e6\u53d1\u65b9\u5f0f-20230925A-347x300.png 347w\" sizes=\"(max-width: 820px) 100vw, 820px\" \/><\/figure><\/div>\n\n\n<p>\u8f6f\u4ef6\u89e6\u53d1\uff0c\u5373\u7528\u6237\u53ef\u4ee5\u5728\u8f6f\u4ef6\u4e0a\u901a\u8fc7\u4e00\u6761\u6307\u4ee4\u89e6\u53d1 ADC \u8f6c\u6362\u3002\u5bf9\u4e8e GD32F303 \u7cfb\u5217\uff0c\u5c31\u662f\u5f80 ADC_CTL1 \u5bc4\u5b58\u5668\u7684 SWRCST \u4f4d\u5199 1\uff0c\u5982\u4e0b\u6240\u793a\u3002\u7b80\u5355\u5e94\u7528\u4e2d\uff0c\u7528\u6237\u53ef\u4ee5\u76f4\u63a5\u7528\u8f6f\u4ef6\u89e6\u53d1 ADC \u8f6c\u6362\uff0c\u7136\u540e\u7b49\u5f85 ADC \u8f6c\u6362\u5b8c\u6210\uff0c\u6700\u540e\u518d\u83b7\u53d6 ADC \u8f6c\u6362\u7ed3\u679c\u5373\u53ef\u3002<\/p>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img decoding=\"async\" loading=\"lazy\" width=\"998\" height=\"689\" src=\"http:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/ADC-\u8f6f\u4ef6\u89e6\u53d1-20230925A.png\" alt=\"\" class=\"wp-image-1986\" srcset=\"https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/ADC-\u8f6f\u4ef6\u89e6\u53d1-20230925A.png 998w, https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/ADC-\u8f6f\u4ef6\u89e6\u53d1-20230925A-300x207.png 300w, https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/ADC-\u8f6f\u4ef6\u89e6\u53d1-20230925A-768x530.png 768w, https:\/\/www.huangrongzhen.ink\/wp-content\/uploads\/2023\/09\/ADC-\u8f6f\u4ef6\u89e6\u53d1-20230925A-435x300.png 435w\" sizes=\"(max-width: 998px) 100vw, 998px\" \/><\/figure><\/div>\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"%E5%8D%95%E9%80%9A%E9%81%93%E8%BD%AF%E4%BB%B6%E8%A7%A6%E5%8F%91\"><\/span>\u5355\u901a\u9053+\u8f6f\u4ef6\u89e6\u53d1<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>\u5bf9\u4e8e GD32F303 \u7cfb\u5217\uff0cADC \u5355\u901a\u9053\u8f93\u5165\uff0c\u4f7f\u7528\u8f6f\u4ef6\u89e6\u53d1\u793a\u4f8b\u4ee3\u7801\u5982\u4e0b\u6240\u793a\u3002\u8fd9\u4e2a\u65b9\u6cd5\u7b80\u5355\u65b9\u4fbf\uff0c\u7f3a\u70b9\u662f\u9700\u8981\u7b49\u5f85 ADC \u8f6c\u6362\u5b8c\u6210\uff0c\u4f1a\u9020\u6210 CPU \u8d44\u6e90\u7684\u6d6a\u8d39\u3002\u6b64\u793a\u4f8b\u4e2d\uff0cADC \u7684\u91c7\u6837\u7387\u7b49\u4e8e ReadADC \u51fd\u6570\u88ab\u8c03\u7528\u7684\u9891\u7387\u3002<\/p>\n\n\n\n<pre class=\"wp-block-code\"><code lang=\"c\" class=\"language-c\">#include \"gd32f30x_conf.h\"\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a InitADC0\n* \u51fd\u6570\u529f\u80fd\uff1a \u521d\u59cb\u5316 ADC0\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a void\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nvoid InitADC0(void)\n{\n  \/\/\u914d\u7f6eADC\u65f6\u949f\u6e90\n  rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV8);\n\n  \/\/GPIO\u914d\u7f6e\n  rcu_periph_clock_enable(RCU_GPIOA);\n  gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_0);\n\n  \/\/\u6240\u6709ADC\u72ec\u7acb\u5de5\u4f5c\n  adc_mode_config(ADC_MODE_FREE);\n\n  \/\/\u914d\u7f6eADC0\n  rcu_periph_clock_enable(RCU_ADC0);                                                            \/\/\u4f7f\u80fd ADC0 \u7684\u65f6\u949f\n  adc_deinit(ADC0);                                                                             \/\/\u590d\u4f4d ADC0\n  adc_special_function_config(ADC0, ADC_SCAN_MODE, DISABLE);                                    \/\/\u5173\u95ed\u626b\u63cf\n  adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, DISABLE);                              \/\/\u5173\u95ed\u8fde\u7eed\u8f6c\u6362\n  adc_resolution_config(ADC0, ADC_RESOLUTION_12B);                                              \/\/\u89c4\u5219\u7ec4\u914d\u7f6e\uff0c12 \u4f4d\u5206\u8fa8\u7387\n  adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);                                         \/\/\u53f3\u5bf9\u9f50\n  adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, 1);                                      \/\/\u89c4\u5219\u7ec4\u957f\u5ea6\uff0c\u5373 ADC \u901a\u9053\u6570\u91cf\n  adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);                               \/\/\u89c4\u5219\u7ec4\u4f7f\u80fd\u5916\u90e8\u89e6\u53d1\n  adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE); \/\/\u89c4\u5219\u7ec4\u4f7f\u7528\u8f6f\u4ef6\u89e6\u53d1\n  adc_oversample_mode_disable(ADC0);                                                            \/\/\u7981\u7528\u8fc7\u91c7\u6837\n\n  \/\/\u914d\u7f6e\u901a\u9053\u91c7\u6837\u987a\u5e8f\uff0c\u91c7\u6837\u987a\u5e8f\u4ece 0 \u5f00\u59cb\n  \/\/ADC \u8f6c\u6362\u7387\uff1a(239.5 + 12.5) \/ (120MHz \/ 8) = 16.8us\n  adc_regular_channel_config(ADC0, 0, ADC_CHANNEL_0, ADC_SAMPLETIME_239POINT5);\n\n  \/\/ADC0 \u4f7f\u80fd\n  adc_enable(ADC0);\n\n  \/\/\u4f7f\u80fd ADC0 \u6821\u51c6\n  adc_calibration_enable(ADC0);\n}\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a ReadADC\n* \u51fd\u6570\u529f\u80fd\uff1a \u8bfb\u53d6 ADC \u8f6c\u6362\u7ed3\u679c\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a ADC \u8f6c\u6362\u7ed3\u679c\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nunsigned short ReadADC(void)\n{\n  unsigned short adc;\n  \n  \/\/\u6e05\u9664\u63a5\u6536\u5b8c\u6210\u6807\u5fd7\u4f4d\n  adc_flag_clear(ADC0, ADC_FLAG_EOC);\n  \n  \/\/\u89c4\u5219\u7ec4\u8f6f\u4ef6\u89e6\u53d1\n  adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL);\n  \n  \/\/\u7b49\u5f85 ADC \u8f6c\u6362\u5b8c\u6210\n  while(RESET == adc_flag_get(ADC0, ADC_FLAG_EOC)){}\n    \n  \/\/\u83b7\u53d6 ADC \u503c\n  adc = adc_regular_data_read(ADC0);\n    \n  \/\/\u8fd4\u56de\u8f6c\u6362\u7ed3\u679c\n  return adc;\n}<\/code><\/pre>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"%E5%A4%9A%E9%80%9A%E9%81%93%E8%BD%AF%E4%BB%B6%E8%A7%A6%E5%8F%91\"><\/span>\u591a\u901a\u9053+\u8f6f\u4ef6\u89e6\u53d1<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>\u5bf9\u4e8e\u591a\u901a\u9053\u8f93\u5165\uff0c\u9700\u8981\u5728\u8bfb\u53d6\u4e4b\u524d\u914d\u7f6e\u91c7\u6837\u987a\u5e8f\uff0c\u5373\u5207\u6362\u5230\u7279\u5b9a\u7684\u91c7\u6837\u901a\u9053\uff0c\u4ee3\u7801\u5982\u4e0b\u6240\u793a\u3002\u540c\u6837\u7684\uff0c\u8fd9\u4e2a\u793a\u4f8b\u4e5f\u4f1a\u9020\u6210 CPU \u8d44\u6e90\u7684\u6d6a\u8d39\uff0c\u4ec5\u9002\u5408\u4e8e\u7b80\u5355\u9879\u76ee\u3002<\/p>\n\n\n\n<pre class=\"wp-block-code\"><code lang=\"c\" class=\"language-c\">#include \"gd32f30x_conf.h\"\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a InitADC0\n* \u51fd\u6570\u529f\u80fd\uff1a \u521d\u59cb\u5316 ADC0\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a void\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nvoid InitADC0(void)\n{\n  \/\/\u914d\u7f6eADC\u65f6\u949f\u6e90\n  rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV8);\n\n  \/\/GPIO\u914d\u7f6e\n  rcu_periph_clock_enable(RCU_GPIOA);\n  gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_0);\n  gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_1);\n\n  \/\/\u6240\u6709ADC\u72ec\u7acb\u5de5\u4f5c\n  adc_mode_config(ADC_MODE_FREE);\n\n  \/\/\u914d\u7f6eADC0\n  rcu_periph_clock_enable(RCU_ADC0);                                                            \/\/\u4f7f\u80fd ADC0 \u7684\u65f6\u949f\n  adc_deinit(ADC0);                                                                             \/\/\u590d\u4f4d ADC0\n  adc_special_function_config(ADC0, ADC_SCAN_MODE, DISABLE);                                    \/\/\u5173\u95ed\u626b\u63cf\n  adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, DISABLE);                              \/\/\u5173\u95ed\u8fde\u7eed\u8f6c\u6362\n  adc_resolution_config(ADC0, ADC_RESOLUTION_12B);                                              \/\/\u89c4\u5219\u7ec4\u914d\u7f6e\uff0c12 \u4f4d\u5206\u8fa8\u7387\n  adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);                                         \/\/\u53f3\u5bf9\u9f50\n  adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, 1);                                      \/\/\u89c4\u5219\u7ec4\u957f\u5ea6\uff0c\u5373 ADC \u901a\u9053\u6570\u91cf\n  adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);                               \/\/\u89c4\u5219\u7ec4\u4f7f\u80fd\u5916\u90e8\u89e6\u53d1\n  adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE); \/\/\u89c4\u5219\u7ec4\u4f7f\u7528\u8f6f\u4ef6\u89e6\u53d1\n  adc_oversample_mode_disable(ADC0);                                                            \/\/\u7981\u7528\u8fc7\u91c7\u6837\n\n  \/\/\u914d\u7f6e\u9ed8\u8ba4\u901a\u9053\u91c7\u6837\u987a\u5e8f\n  \/\/ADC \u8f6c\u6362\u7387\uff1a(239.5 + 12.5) \/ (120MHz \/ 8) = 16.8us\n  adc_regular_channel_config(ADC0, 0, ADC_CHANNEL_0, ADC_SAMPLETIME_239POINT5);\n\n  \/\/ADC0 \u4f7f\u80fd\n  adc_enable(ADC0);\n\n  \/\/\u4f7f\u80fd ADC0 \u6821\u51c6\n  adc_calibration_enable(ADC0);\n}\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a ADC0ReadCH0\n* \u51fd\u6570\u529f\u80fd\uff1a \u8bfb\u53d6 ADC0 \u901a\u9053 0 \u8f6c\u6362\u7ed3\u679c\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a ADC \u8f6c\u6362\u7ed3\u679c\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nunsigned short ADC0ReadCH0(void)\n{\n  unsigned short adc;\n  \n  \/\/\u5207\u6362\u5230\u901a\u9053 0\n  adc_regular_channel_config(ADC0, 0, ADC_CHANNEL_0, ADC_SAMPLETIME_239POINT5);\n  \n  \/\/\u6e05\u9664\u63a5\u6536\u5b8c\u6210\u6807\u5fd7\u4f4d\n  adc_flag_clear(ADC0, ADC_FLAG_EOC);\n  \n  \/\/\u89c4\u5219\u7ec4\u8f6f\u4ef6\u89e6\u53d1\n  adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL);\n  \n  \/\/\u7b49\u5f85 ADC \u8f6c\u6362\u5b8c\u6210\n  while(RESET == adc_flag_get(ADC0, ADC_FLAG_EOC)){}\n    \n  \/\/\u83b7\u53d6 ADC \u503c\n  adc = adc_regular_data_read(ADC0);\n    \n  \/\/\u8fd4\u56de\u8f6c\u6362\u7ed3\u679c\n  return adc;\n}\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a ADC0ReadCH1\n* \u51fd\u6570\u529f\u80fd\uff1a \u8bfb\u53d6 ADC0 \u901a\u9053 1 \u8f6c\u6362\u7ed3\u679c\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a ADC \u8f6c\u6362\u7ed3\u679c\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nunsigned short ADC0ReadCH1(void)\n{\n  unsigned short adc;\n  \n  \/\/\u5207\u6362\u5230\u901a\u9053 1\n  adc_regular_channel_config(ADC0, 0, ADC_CHANNEL_1, ADC_SAMPLETIME_239POINT5);\n  \n  \/\/\u6e05\u9664\u63a5\u6536\u5b8c\u6210\u6807\u5fd7\u4f4d\n  adc_flag_clear(ADC0, ADC_FLAG_EOC);\n  \n  \/\/\u89c4\u5219\u7ec4\u8f6f\u4ef6\u89e6\u53d1\n  adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL);\n  \n  \/\/\u7b49\u5f85 ADC \u8f6c\u6362\u5b8c\u6210\n  while(RESET == adc_flag_get(ADC0, ADC_FLAG_EOC)){}\n    \n  \/\/\u83b7\u53d6 ADC \u503c\n  adc = adc_regular_data_read(ADC0);\n    \n  \/\/\u8fd4\u56de\u8f6c\u6362\u7ed3\u679c\n  return adc;\n}<\/code><\/pre>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"%E5%A4%9A%E9%80%9A%E9%81%93DMA%E8%BD%AF%E4%BB%B6%E8%A7%A6%E5%8F%91\"><\/span>\u591a\u901a\u9053+DMA+\u8f6f\u4ef6\u89e6\u53d1<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>\u4f7f\u7528 DMA \u5b9e\u73b0 ADC \u591a\u901a\u9053\u8f93\u5165\u5982\u4e0b\u6240\u793a\u3002\u9700\u8981\u6ce8\u610f\uff0c\u4e3a\u9632\u6b62\u6570\u636e\u7f13\u51b2\u533a\u4e2d\u7684 ADC \u901a\u9053\u6570\u636e\u51fa\u73b0\u9519\u4f4d\uff0cDMA \u914d\u7f6e\u9700\u8981\u5728 ADC \u914d\u7f6e\u4e4b\u524d\u3002\u6ce8\u610f\uff1a\u4f7f\u7528 DMA \u7684\u60c5\u51b5\u4e0b\uff0c\u65e0\u8bba\u901a\u9053\u6570\u91cf\u662f\u591a\u5c11\uff0c\u5fc5\u987b\u5f00\u542f\u626b\u63cf\u6a21\u5f0f\u3002<\/p>\n\n\n\n<pre class=\"wp-block-code\"><code lang=\"c\" class=\"language-c\">#include \"gd32f30x_conf.h\"\n\n\/\/\u901a\u9053\u6570\u91cf\n#define ADC_CH_NUM 2\n\n\/\/ADC \u6570\u636e\u7f13\u51b2\u533a\uff0c\u7531 DMA \u81ea\u52a8\u642c\u8fd0\nstatic unsigned short s_arrADCBuf[ADC_CH_NUM] = {0}; \n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a InitADC0\n* \u51fd\u6570\u529f\u80fd\uff1a \u521d\u59cb\u5316 ADC0\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a void\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nvoid InitADC0(void)\n{\n  \/\/DMA \u521d\u59cb\u5316\u7ed3\u6784\u4f53\n  dma_parameter_struct dma_init_struct;\n  \n  \/\/DMA \u914d\u7f6e\n  rcu_periph_clock_enable(RCU_DMA0);                           \/\/\u4f7f\u80fd DMA0 \u65f6\u949f\n  dma_deinit(DMA0, DMA_CH0);                                   \/\/\u521d\u59cb\u5316\u7ed3\u6784\u4f53\u8bbe\u7f6e\u9ed8\u8ba4\u503c\n  dma_init_struct.direction  = DMA_PERIPHERAL_TO_MEMORY;       \/\/\u8bbe\u7f6e\u6570\u636e\u4f20\u8f93\u65b9\u5411\n  dma_init_struct.memory_addr  = (uint32_t)s_arrADCBuf;        \/\/\u5185\u5b58\u5730\u5740\u8bbe\u7f6e\n  dma_init_struct.memory_inc   = DMA_MEMORY_INCREASE_ENABLE;   \/\/\u5185\u5b58\u589e\u957f\u4f7f\u80fd\n  dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT;       \/\/\u5185\u5b58\u6570\u636e\u4f4d\u6570\u8bbe\u7f6e\n  dma_init_struct.number       = ADC_CH_NUM;                   \/\/\u5185\u5b58\u6570\u636e\u91cf\u8bbe\u7f6e\n  dma_init_struct.periph_addr  = (uint32_t)&amp;(ADC_RDATA(ADC0)); \/\/\u5916\u8bbe\u5730\u5740\u8bbe\u7f6e\n  dma_init_struct.periph_inc   = DMA_PERIPH_INCREASE_DISABLE;  \/\/\u5916\u8bbe\u5730\u5740\u589e\u957f\u5931\u80fd\n  dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;   \/\/\u5916\u8bbe\u6570\u636e\u4f4d\u6570\u8bbe\u7f6e\n  dma_init_struct.priority   = DMA_PRIORITY_ULTRA_HIGH;        \/\/\u4f18\u5148\u7ea7\u8bbe\u7f6e\n  dma_init(DMA0, DMA_CH0, &amp;dma_init_struct);                   \/\/\u521d\u59cb\u5316\u7ed3\u6784\u4f53\n  dma_circulation_enable(DMA0, DMA_CH0);                       \/\/\u4f7f\u80fd\u5faa\u73af\n  dma_memory_to_memory_disable(DMA0, DMA_CH0);                 \/\/\u7981\u7528\u5185\u5b58\u5230\u5185\u5b58\n  dma_channel_enable(DMA0, DMA_CH0);                           \/\/\u4f7f\u80fd DMA\n  \n  \/\/\u914d\u7f6eADC\u65f6\u949f\u6e90\n  rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV8);\n\n  \/\/GPIO \u914d\u7f6e\n  rcu_periph_clock_enable(RCU_GPIOA);\n  gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_0);\n  gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_1);\n\n  \/\/\u6240\u6709 ADC \u72ec\u7acb\u5de5\u4f5c\n  adc_mode_config(ADC_MODE_FREE);\n\n  \/\/\u914d\u7f6e ADC0\n  rcu_periph_clock_enable(RCU_ADC0);                                                            \/\/\u4f7f\u80fd ADC0 \u7684\u65f6\u949f\n  adc_deinit(ADC0);                                                                             \/\/\u590d\u4f4d ADC0\n  adc_special_function_config(ADC0, ADC_SCAN_MODE, ENABLE);                                     \/\/\u4f7f\u80fd ADC \u626b\u63cf\uff0c\u5373\u5f00\u542f\u591a\u901a\u9053\u8f6c\u6362\n  adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, ENABLE);                               \/\/\u4f7f\u80fd\u8fde\u7eed\u91c7\u6837\n  adc_resolution_config(ADC0, ADC_RESOLUTION_12B);                                              \/\/\u89c4\u5219\u7ec4\u914d\u7f6e\uff0c12 \u4f4d\u5206\u8fa8\u7387\n  adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);                                         \/\/\u53f3\u5bf9\u9f50\n  adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, ADC_CH_NUM);                             \/\/\u89c4\u5219\u7ec4\u957f\u5ea6\uff0c\u5373 ADC \u901a\u9053\u6570\u91cf\n  adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);                               \/\/\u89c4\u5219\u7ec4\u4f7f\u80fd\u5916\u90e8\u89e6\u53d1\n  adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE); \/\/\u89c4\u5219\u7ec4\u4f7f\u7528\u8f6f\u4ef6\u89e6\u53d1\n  adc_oversample_mode_disable(ADC0);                                                            \/\/\u7981\u7528\u8fc7\u91c7\u6837\n\n  \/\/\u914d\u7f6e\u901a\u9053\u91c7\u6837\u987a\u5e8f\uff0c\u91c7\u6837\u987a\u5e8f\u4ece 0 \u5f00\u59cb\n  \/\/ADC \u8f6c\u6362\u7387\uff1a(239.5 + 12.5) \/ (120MHz \/ 8) = 16.8us\n  adc_regular_channel_config(ADC0, 0, ADC_CHANNEL_0, ADC_SAMPLETIME_239POINT5);\n  adc_regular_channel_config(ADC0, 1, ADC_CHANNEL_1, ADC_SAMPLETIME_239POINT5);\n\n  \/\/ADC0 \u4f7f\u80fd\n  adc_enable(ADC0);\n\n  \/\/\u4f7f\u80fd ADC0 \u6821\u51c6\n  adc_calibration_enable(ADC0);\n\n  \/\/\u4f7f\u80fd DMA\n  adc_dma_mode_enable(ADC0);\n\n  \/\/\u89c4\u5219\u7ec4\u8f6f\u4ef6\u89e6\u53d1\n  adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL);\n}\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a ADC0ReadCH0\n* \u51fd\u6570\u529f\u80fd\uff1a \u8bfb\u53d6 ADC0 \u901a\u9053 0 \u8f6c\u6362\u7ed3\u679c\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a ADC \u8f6c\u6362\u7ed3\u679c\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nunsigned short ADC0ReadCH0(void)\n{\n  return s_arrADCBuf[0];\n}\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a ADC0ReadCH1\n* \u51fd\u6570\u529f\u80fd\uff1a \u8bfb\u53d6 ADC0 \u901a\u9053 1 \u8f6c\u6362\u7ed3\u679c\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a ADC \u8f6c\u6362\u7ed3\u679c\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nunsigned short ADC0ReadCH1(void)\n{\n  return s_arrADCBuf[1];\n}<\/code><\/pre>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"DMA%E8%BD%AF%E4%BB%B6%E8%A7%A6%E5%8F%91%E9%AB%98%E9%80%9F%E9%87%87%E9%9B%86\"><\/span>DMA+\u8f6f\u4ef6\u89e6\u53d1+\u9ad8\u901f\u91c7\u96c6<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>\u4e0a\u8ff0\u65b9\u6cd5\u5b9e\u73b0\u7684 ADC \u9a71\u52a8\uff0c\u91c7\u6837\u7387\u5b8c\u5168\u7531\u7528\u6237\u7684\u8bfb\u53d6\u9891\u7387\u6765\u51b3\u5b9a\u3002\u7136\u800c\uff0c\u8fd9\u79cd\u65b9\u5f0f\u91c7\u6837\u7387\u5f88\u4f4e\uff0c\u4e00\u822c\u53ea\u80fd\u8fbe\u5230\u51e0 kHz\u3002\u800c\u4e14\u5728\u7cfb\u7edf\u9ad8\u8d1f\u8377\u5de5\u4f5c\u60c5\u51b5\u4e0b\uff0c\u91c7\u6837\u7387\u7684\u7cbe\u5ea6\u5f97\u4e0d\u5230\u4fdd\u969c\u3002\u4f8b\u5982\u91c7\u6837\u4efb\u52a1\u653e\u5230\u4e86 2ms \u4efb\u52a1\u4e2d\uff0c\u6bcf\u9694 2ms \u91c7\u96c6\u4e00\u6b21\u6570\u636e\uff0c\u8fd9\u6837\u4e00\u6765\u91c7\u6837\u7387\u4e3a 500Hz\u3002\u4f46\u662f\uff0c\u7531\u4e8e\u7cfb\u7edf\u9ad8\u8d1f\u8377\u8fd0\u884c\uff0c\u5bfc\u81f4 2ms \u4efb\u52a1\u4e0d\u662f\u90a3\u4e48\u51c6\u786e\uff0c\u8fd9\u5c31\u4e25\u91cd\u5e72\u6270\u5230\u4e86 ADC \u7684\u91c7\u6837\u3002\u5982\u679c\u662f\u5fc3\u7535\u6570\u636e\uff0c\u90a3\u4e48\u8fd9\u4e2a\u5e72\u6270\u4f1a\u5bf9\u6ee4\u6ce2\u5668\u9020\u6210\u5f88\u5927\u7684\u5f71\u54cd\u3002<\/p>\n\n\n\n<p>\u4f7f\u7528 DMA \u9ad8\u901f\u91c7\u96c6 ADC \u6570\u636e\u793a\u4f8b\u5982\u4e0b\u3002\u8fd9\u91cc\uff0cADC \u65f6\u949f\u4e3a APB2 \u7684 8 \u5206\u9891\uff0c\u5373 120MHz \/ 8 = 15MHz\u3002\u6240\u4ee5 ADC \u7684\u8f6c\u6362\u7387\u4e3a 15MHz \/ (239.5 + 12.5) = 59.524kHz\u3002<\/p>\n\n\n\n<p>\u521d\u59cb\u5316\u65f6\uff0cDMA \u4f20\u8f93\u6570\u636e\u91cf\u4e3a 1024\uff0c\u6240\u4ee5 ADC \u6bcf\u8f6c\u6362\u5b8c\u6210\u4e00\u6b21\uff0c\u5c31\u4f1a\u81ea\u52a8\u89e6\u53d1 DMA \u4f20\u8f93\uff0c\u5c06 ADC \u8f6c\u6362\u7ed3\u679c\u4fdd\u5b58\u5230 s_arrADCBuf \u7f13\u51b2\u533a\u4e2d\u3002\u6b64\u65f6\uff0cs_arrADCBuf \u7f13\u51b2\u533a\u4e2d\u6570\u636e\u7684\u91c7\u6837\u7387\u5373\u4e3a ADC \u7684\u8f6c\u6362\u7387\uff0c\u4e3a 59.524kHz\u3002\u7528\u6237\u53ef\u4ee5\u901a\u8fc7\u8c03\u8282 ADC \u65f6\u949f\u548c ADC \u901a\u9053\u7684\u91c7\u6837\u65f6\u95f4\u6765\u8c03\u8282\u91c7\u6837\u7387\u3002<\/p>\n\n\n\n<p>\u6ce8\u610f\uff1a\u5728\u8fd9\u91cc DMA \u88ab\u914d\u7f6e\u6210\u4e86\u5355\u6b21\u4f20\u8f93\u6a21\u5f0f\uff0c\u5e76\u4e14\u5f00\u542f\u4e86 DMA \u4f20\u8f93\u5b8c\u6210\u4e2d\u65ad\u3002\u4e00\u65e6\u6570\u636e\u91c7\u96c6\u5b8c\u6210\uff0cDMA \u4e2d\u65ad\u91cc\u4f1a\u8bbe\u5b9a\u6807\u5fd7\u4f4d\uff0c\u7136\u540e\u5c06\u6570\u636e\u79fb\u4ea4\u5230\u4e3b\u7ebf\u7a0b\u53bb\u5904\u7406\u3002\u6570\u636e\u5904\u7406\u5b8c\u6210\u540e\uff0c\u7528\u6237\u9700\u8981\u8c03\u7528 InitADC0 \u51fd\u6570\uff0c\u91cd\u65b0\u914d\u7f6e ADC\uff0c\u7528\u4ee5\u89e6\u53d1\u4e0b\u4e00\u6b21\u91c7\u6837\u3002<\/p>\n\n\n\n<pre class=\"wp-block-code\"><code lang=\"c\" class=\"language-c\">#include \"gd32f30x_conf.h\"\n\n\/\/\u7a7a\u6307\u9488\u5b9a\u4e49\n#ifndef NULL\n  #define NULL 0\n#endif\n\n\/\/\u901a\u9053\u91c7\u6837\u6570\u91cf\n#define ADC_CH_LEN 1024\n\n\/\/ADC \u6570\u636e\u7f13\u51b2\u533a\uff0c\u7531 DMA \u81ea\u52a8\u642c\u8fd0\nstatic unsigned short s_arrADCBuf[ADC_CH_LEN] = {0};\nstatic unsigned char s_iADCFlag = 0;\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a InitADC0\n* \u51fd\u6570\u529f\u80fd\uff1a \u521d\u59cb\u5316 ADC0\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a void\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nvoid InitADC0(void)\n{\n  \/\/DMA \u521d\u59cb\u5316\u7ed3\u6784\u4f53\n  dma_parameter_struct dma_init_struct;\n  \n  \/\/DMA \u914d\u7f6e\n  rcu_periph_clock_enable(RCU_DMA0);                           \/\/\u4f7f\u80fd DMA0 \u65f6\u949f\n  dma_deinit(DMA0, DMA_CH0);                                   \/\/\u521d\u59cb\u5316\u7ed3\u6784\u4f53\u8bbe\u7f6e\u9ed8\u8ba4\u503c\n  dma_init_struct.direction  = DMA_PERIPHERAL_TO_MEMORY;       \/\/\u8bbe\u7f6e\u6570\u636e\u4f20\u8f93\u65b9\u5411\n  dma_init_struct.memory_addr  = (uint32_t)s_arrADCBuf;        \/\/\u5185\u5b58\u5730\u5740\u8bbe\u7f6e\n  dma_init_struct.memory_inc   = DMA_MEMORY_INCREASE_ENABLE;   \/\/\u5185\u5b58\u589e\u957f\u4f7f\u80fd\n  dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT;       \/\/\u5185\u5b58\u6570\u636e\u4f4d\u6570\u8bbe\u7f6e\n  dma_init_struct.number       = ADC_CH_LEN;                   \/\/\u5185\u5b58\u6570\u636e\u91cf\u8bbe\u7f6e\n  dma_init_struct.periph_addr  = (uint32_t)&amp;(ADC_RDATA(ADC0)); \/\/\u5916\u8bbe\u5730\u5740\u8bbe\u7f6e\n  dma_init_struct.periph_inc   = DMA_PERIPH_INCREASE_DISABLE;  \/\/\u5916\u8bbe\u5730\u5740\u589e\u957f\u5931\u80fd\n  dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;   \/\/\u5916\u8bbe\u6570\u636e\u4f4d\u6570\u8bbe\u7f6e\n  dma_init_struct.priority   = DMA_PRIORITY_ULTRA_HIGH;        \/\/\u4f18\u5148\u7ea7\u8bbe\u7f6e\n  dma_init(DMA0, DMA_CH0, &amp;dma_init_struct);                   \/\/\u521d\u59cb\u5316\u7ed3\u6784\u4f53\n  dma_circulation_disable(DMA0, DMA_CH0);                      \/\/\u5173\u95ed\u5faa\u73af\n  dma_memory_to_memory_disable(DMA0, DMA_CH0);                 \/\/\u7981\u7528\u5185\u5b58\u5230\u5185\u5b58\n  nvic_irq_enable(DMA0_Channel0_IRQn, 2, 2);                   \/\/\u4f7f\u80fd DMA0 \u901a\u9053 0 \u7684 NVIC\n  dma_interrupt_enable(DMA0, DMA_CH0, DMA_INT_FTF);            \/\/\u5f00\u542f\u63a5\u6536\u5b8c\u6210\u4e2d\u65ad\n  dma_channel_enable(DMA0, DMA_CH0);                           \/\/\u4f7f\u80fd DMA\n  \n  \/\/\u914d\u7f6e ADC \u65f6\u949f\u6e90\n  rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV8);\n\n  \/\/GPIO \u914d\u7f6e\n  rcu_periph_clock_enable(RCU_GPIOA);\n  gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_0);\n\n  \/\/\u6240\u6709 ADC \u72ec\u7acb\u5de5\u4f5c\n  adc_mode_config(ADC_MODE_FREE);\n\n  \/\/\u914d\u7f6e ADC0\n  rcu_periph_clock_enable(RCU_ADC0);                                                            \/\/\u4f7f\u80fd ADC0 \u7684\u65f6\u949f\n  adc_deinit(ADC0);                                                                             \/\/\u590d\u4f4d ADC0\n  adc_special_function_config(ADC0, ADC_SCAN_MODE, ENABLE);                                     \/\/\u4f7f\u80fd ADC \u626b\u63cf\uff0c\u5373\u5f00\u542f\u591a\u901a\u9053\u8f6c\u6362\n  adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, ENABLE);                               \/\/\u4f7f\u80fd\u8fde\u7eed\u91c7\u6837\n  adc_resolution_config(ADC0, ADC_RESOLUTION_12B);                                              \/\/\u89c4\u5219\u7ec4\u914d\u7f6e\uff0c12 \u4f4d\u5206\u8fa8\u7387\n  adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);                                         \/\/\u53f3\u5bf9\u9f50\n  adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, 1);                                      \/\/\u89c4\u5219\u7ec4\u957f\u5ea6\uff0c\u5373 ADC \u901a\u9053\u6570\u91cf\n  adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);                               \/\/\u89c4\u5219\u7ec4\u4f7f\u80fd\u5916\u90e8\u89e6\u53d1\n  adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE); \/\/\u89c4\u5219\u7ec4\u4f7f\u7528\u8f6f\u4ef6\u89e6\u53d1\n  adc_oversample_mode_disable(ADC0);                                                            \/\/\u7981\u7528\u8fc7\u91c7\u6837\n\n  \/\/\u914d\u7f6e\u901a\u9053\u91c7\u6837\u987a\u5e8f\uff0c\u91c7\u6837\u987a\u5e8f\u4ece 0 \u5f00\u59cb\n  \/\/ADC \u8f6c\u6362\u7387\uff1a(239.5 + 12.5) \/ (120MHz \/ 8) = 16.8us\n  adc_regular_channel_config(ADC0, 0, ADC_CHANNEL_0, ADC_SAMPLETIME_239POINT5);\n\n  \/\/ADC0 \u4f7f\u80fd\n  adc_enable(ADC0);\n\n  \/\/\u4f7f\u80fd ADC0 \u6821\u51c6\n  adc_calibration_enable(ADC0);\n\n  \/\/\u4f7f\u80fd DMA\n  adc_dma_mode_enable(ADC0);\n\n  \/\/\u89c4\u5219\u7ec4\u8f6f\u4ef6\u89e6\u53d1\n  adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL);\n}\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a DMA0_Channel0_IRQHandler\n* \u51fd\u6570\u529f\u80fd\uff1a DMA0 \u901a\u9053 0 \u4e2d\u65ad\u670d\u52a1\u51fd\u6570\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a void\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nvoid DMA0_Channel0_IRQHandler(void)\n{\n  \/\/\u6e05\u9664\u4e2d\u65ad\u6807\u5fd7\u4f4d\n  dma_interrupt_flag_clear(DMA0, DMA_CH0, DMA_INT_FLAG_FTF);\n  \n  \/\/\u6807\u8bb0\u5df2\u7ecf\u63a5\u6536\u5230\u4e00\u6279\u6570\u636e\n  s_iADCFlag = 1;\n}\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a ADC0ReadCH0\n* \u51fd\u6570\u529f\u80fd\uff1a \u8bfb\u53d6 ADC0 \u901a\u9053 0 \u8f6c\u6362\u7ed3\u679c\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a NULL\uff1a\u6570\u636e\u63a5\u6536\u5c1a\u672a\u5b8c\u6210\uff0c\u5176\u5b83\uff1aADC \u6570\u636e\u7f13\u51b2\u533a\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a \u5fc5\u987b\u8981\u91cd\u65b0\u521d\u59cb\u5316\u624d\u80fd\u89e6\u53d1\u4e0b\u4e00\u6b21\u8f6c\u6362\n**********************************************************************************************************\/\nunsigned short* ADC0ReadCH0(void)\n{\n  if(0 == s_iADCFlag)\n  {\n    return NULL;\n  }\n  s_iADCFlag = 0;\n  return s_arrADCBuf;\n}<\/code><\/pre>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"DMA%E5%AE%9A%E6%97%B6%E5%99%A8%E6%9B%B4%E6%96%B0%E4%BA%8B%E4%BB%B6%E8%A7%A6%E5%8F%91%E9%AB%98%E9%80%9F%E9%87%87%E9%9B%86\"><\/span>DMA+\u5b9a\u65f6\u5668\u66f4\u65b0\u4e8b\u4ef6\u89e6\u53d1+\u9ad8\u901f\u91c7\u96c6<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>\u4f7f\u7528 ADC \u8f6c\u6362\u7387\u505a\u4e3a\u91c7\u6837\u7387\u56fa\u7136\u65b9\u4fbf\uff0c\u53ef\u662f\u4e0d\u662f\u90a3\u4e48\u7075\u6d3b\u3002\u8fd9\u65f6\u5019\u6211\u4eec\u53ef\u4ee5\u7528\u4e00\u4e2a\u5b9a\u65f6\u5668\u89e6\u53d1 ADC \u8f6c\u6362\uff0c\u5982\u4e0b\u6240\u793a\u3002\u901a\u8fc7\u53c2\u8003\u624b\u518c\u53ef\u4ee5\u77e5\u9053\uff0cADC0 \u53ef\u4ee5\u88ab TIMER2 \u7684\u66f4\u65b0\u4e8b\u4ef6\u89e6\u53d1\u3002\u6b64\u5904\u5b9a\u65f6\u5668\u66f4\u65b0\u65f6\u95f4\u5468\u671f\u8bbe\u5b9a\u4e3a 100us\uff0c\u91c7\u6837\u7387\u76f4\u63a5\u5c31\u662f 10kHz\uff0c\u975e\u5e38\u7075\u6d3b\u65b9\u4fbf\u3002<\/p>\n\n\n\n<pre class=\"wp-block-code\"><code lang=\"c\" class=\"language-c\">#include \"gd32f30x_conf.h\"\n\n\/\/\u7a7a\u6307\u9488\u5b9a\u4e49\n#ifndef NULL\n  #define NULL 0\n#endif\n\n\/\/\u901a\u9053\u91c7\u6837\u6570\u91cf\n#define ADC_CH_LEN 1024\n\n\/\/ADC \u6570\u636e\u7f13\u51b2\u533a\uff0c\u7531 DMA \u81ea\u52a8\u642c\u8fd0\nstatic unsigned short s_arrADCBuf[ADC_CH_LEN] = {0};\nstatic unsigned char s_iADCFlag = {0};\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a InitADC0\n* \u51fd\u6570\u529f\u80fd\uff1a \u521d\u59cb\u5316 ADC0\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a void\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nvoid InitADC0(void)\n{\n  \/\/DMA \u521d\u59cb\u5316\u7ed3\u6784\u4f53\n  dma_parameter_struct dma_init_struct;\n  \n  \/\/\u5b9a\u65f6\u5668\u521d\u59cb\u5316\u7ed3\u6784\u4f53\n  timer_parameter_struct timer_initpara;\n  \n  \/\/DMA \u914d\u7f6e\n  rcu_periph_clock_enable(RCU_DMA0);                           \/\/\u4f7f\u80fd DMA0 \u65f6\u949f\n  dma_deinit(DMA0, DMA_CH0);                                   \/\/\u521d\u59cb\u5316\u7ed3\u6784\u4f53\u8bbe\u7f6e\u9ed8\u8ba4\u503c\n  dma_init_struct.direction  = DMA_PERIPHERAL_TO_MEMORY;       \/\/\u8bbe\u7f6e\u6570\u636e\u4f20\u8f93\u65b9\u5411\n  dma_init_struct.memory_addr  = (uint32_t)s_arrADCBuf;        \/\/\u5185\u5b58\u5730\u5740\u8bbe\u7f6e\n  dma_init_struct.memory_inc   = DMA_MEMORY_INCREASE_ENABLE;   \/\/\u5185\u5b58\u589e\u957f\u4f7f\u80fd\n  dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT;       \/\/\u5185\u5b58\u6570\u636e\u4f4d\u6570\u8bbe\u7f6e\n  dma_init_struct.number       = ADC_CH_LEN;                   \/\/\u5185\u5b58\u6570\u636e\u91cf\u8bbe\u7f6e\n  dma_init_struct.periph_addr  = (uint32_t)&amp;(ADC_RDATA(ADC0)); \/\/\u5916\u8bbe\u5730\u5740\u8bbe\u7f6e\n  dma_init_struct.periph_inc   = DMA_PERIPH_INCREASE_DISABLE;  \/\/\u5916\u8bbe\u5730\u5740\u589e\u957f\u5931\u80fd\n  dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;   \/\/\u5916\u8bbe\u6570\u636e\u4f4d\u6570\u8bbe\u7f6e\n  dma_init_struct.priority   = DMA_PRIORITY_ULTRA_HIGH;        \/\/\u4f18\u5148\u7ea7\u8bbe\u7f6e\n  dma_init(DMA0, DMA_CH0, &amp;dma_init_struct);                   \/\/\u521d\u59cb\u5316\u7ed3\u6784\u4f53\n  dma_circulation_disable(DMA0, DMA_CH0);                      \/\/\u5173\u95ed\u5faa\u73af\n  dma_memory_to_memory_disable(DMA0, DMA_CH0);                 \/\/\u7981\u7528\u5185\u5b58\u5230\u5185\u5b58\n  nvic_irq_enable(DMA0_Channel0_IRQn, 2, 2);                   \/\/\u4f7f\u80fd DMA0 \u901a\u9053 0 \u7684 NVIC\n  dma_interrupt_enable(DMA0, DMA_CH0, DMA_INT_FTF);            \/\/\u5f00\u542f\u63a5\u6536\u5b8c\u6210\u4e2d\u65ad\n  dma_channel_enable(DMA0, DMA_CH0);                           \/\/\u4f7f\u80fd DMA\n  \n  \/\/\u914d\u7f6e TIMER2\n  rcu_periph_clock_enable(RCU_TIMER2);                                         \/\/\u4f7f\u80fd TIMER2 \u7684\u65f6\u949f\n  timer_deinit(TIMER2);                                                        \/\/\u8bbe\u7f6e TIMER2 \u53c2\u6570\u6062\u590d\u9ed8\u8ba4\u503c\n  timer_struct_para_init(&amp;timer_initpara);                                     \/\/\u521d\u59cb\u5316 timer_initpara\n  timer_initpara.prescaler         = 119;                                      \/\/\u8bbe\u7f6e\u9884\u5206\u9891\u5668\u503c\n  timer_initpara.counterdirection  = TIMER_COUNTER_UP;                         \/\/\u8bbe\u7f6e\u5411\u4e0a\u8ba1\u6570\u6a21\u5f0f\n  timer_initpara.period            = 99;                                       \/\/\u8bbe\u7f6e\u81ea\u52a8\u91cd\u88c5\u8f7d\u503c\n  timer_initpara.clockdivision     = TIMER_CKDIV_DIV1;                         \/\/\u8bbe\u7f6e\u65f6\u949f\u5206\u5272\n  timer_init(TIMER2, &amp;timer_initpara);                                         \/\/\u6839\u636e\u53c2\u6570\u521d\u59cb\u5316\u5b9a\u65f6\u5668\n  timer_master_output_trigger_source_select(TIMER2, TIMER_TRI_OUT_SRC_UPDATE); \/\/\u5b9a\u65f6\u5668\u66f4\u65b0\u4e8b\u4ef6\u505a\u4e3a\u89e6\u53d1\u6e90\n\n  \/\/GPIO \u914d\u7f6e\n  rcu_periph_clock_enable(RCU_GPIOA);\n  gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_0);\n\n  \/\/\u914d\u7f6e ADC0\n  rcu_periph_clock_enable(RCU_ADC0);                                                             \/\/\u4f7f\u80fd ADC0 \u7684\u65f6\u949f\n  adc_deinit(ADC0);                                                                              \/\/\u590d\u4f4d ADC0\n  rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV8);                                                   \/\/\u914d\u7f6e ADC \u65f6\u949f\u6e90\n  adc_mode_config(ADC_MODE_FREE);                                                                \/\/\u6240\u6709 ADC \u72ec\u7acb\u5de5\u4f5c\n  adc_special_function_config(ADC0, ADC_SCAN_MODE, ENABLE);                                      \/\/\u4f7f\u80fd ADC \u626b\u63cf\uff0c\u5373\u5f00\u542f\u591a\u901a\u9053\u8f6c\u6362\n  adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, DISABLE);                               \/\/\u5173\u95ed\u8fde\u7eed\u91c7\u6837\n  adc_resolution_config(ADC0, ADC_RESOLUTION_12B);                                               \/\/\u89c4\u5219\u7ec4\u914d\u7f6e\uff0c12 \u4f4d\u5206\u8fa8\u7387\n  adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);                                          \/\/\u53f3\u5bf9\u9f50\n  adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, 1);                                       \/\/\u89c4\u5219\u7ec4\u957f\u5ea6\uff0c\u5373 ADC \u901a\u9053\u6570\u91cf\n  adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);                                \/\/\u89c4\u5219\u7ec4\u4f7f\u80fd\u5916\u90e8\u89e6\u53d1\n  adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_EXTTRIG_REGULAR_T2_TRGO); \/\/\u89c4\u5219\u7ec4\u4f7f\u7528 TIMER2 \u89e6\u53d1\n  adc_oversample_mode_disable(ADC0);                                                             \/\/\u7981\u7528\u8fc7\u91c7\u6837\n  adc_dma_mode_enable(ADC0);                                                                     \/\/\u4f7f\u80fd DMA\n\n  \/\/\u914d\u7f6e\u901a\u9053\u91c7\u6837\u987a\u5e8f\uff0c\u91c7\u6837\u987a\u5e8f\u4ece 0 \u5f00\u59cb\n  \/\/ADC \u8f6c\u6362\u7387\uff1a(239.5 + 12.5) \/ (120MHz \/ 8) = 16.8us\n  adc_regular_channel_config(ADC0, 0, ADC_CHANNEL_0, ADC_SAMPLETIME_239POINT5);\n\n  \/\/ADC0 \u4f7f\u80fd\n  adc_enable(ADC0);\n\n  \/\/\u4f7f\u80fd ADC0 \u6821\u51c6\n  adc_calibration_enable(ADC0);\n  \n  \/\/\u5f00\u59cb\u8f6c\u6362\n  timer_enable(TIMER2);\n}\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a DMA0_Channel0_IRQHandler\n* \u51fd\u6570\u529f\u80fd\uff1a DMA0 \u901a\u9053 0 \u4e2d\u65ad\u670d\u52a1\u51fd\u6570\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a void\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nvoid DMA0_Channel0_IRQHandler(void)\n{  \n  \/\/\u6e05\u9664\u4e2d\u65ad\u6807\u5fd7\u4f4d\n  dma_interrupt_flag_clear(DMA0, DMA_CH0, DMA_INT_FLAG_FTF);\n  \n  \/\/\u6807\u8bb0\u5df2\u7ecf\u63a5\u6536\u5230\u4e00\u6279\u6570\u636e\n  s_iADCFlag = 1;\n}\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a ADC0ReadCH0\n* \u51fd\u6570\u529f\u80fd\uff1a \u8bfb\u53d6 ADC0 \u901a\u9053 0 \u8f6c\u6362\u7ed3\u679c\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a NULL\uff1a\u6570\u636e\u63a5\u6536\u5c1a\u672a\u5b8c\u6210\uff0c\u5176\u5b83\uff1aADC \u6570\u636e\u7f13\u51b2\u533a\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a \u5fc5\u987b\u8981\u91cd\u65b0\u521d\u59cb\u5316\u624d\u80fd\u89e6\u53d1\u4e0b\u4e00\u6b21\u8f6c\u6362\n**********************************************************************************************************\/\nunsigned short* ADC0ReadCH0(void)\n{\n  if(0 == s_iADCFlag)\n  {\n    return NULL;\n  }\n  s_iADCFlag = 0;\n  return s_arrADCBuf;\n}<\/code><\/pre>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"DMA%E5%AE%9A%E6%97%B6%E5%99%A8%E6%AF%94%E8%BE%83%E4%BA%8B%E4%BB%B6%E8%A7%A6%E5%8F%91%E9%AB%98%E9%80%9F%E9%87%87%E9%9B%86\"><\/span>DMA+\u5b9a\u65f6\u5668\u6bd4\u8f83\u4e8b\u4ef6\u89e6\u53d1+\u9ad8\u901f\u91c7\u96c6<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>\u9664\u4e86\u66f4\u65b0\u4e8b\u4ef6\u5916\uff0cADC \u8fd8\u53ef\u4ee5\u901a\u8fc7\u5b9a\u65f6\u5668\u7684\u6bd4\u8f83\u4e8b\u4ef6\u8f93\u51fa\u89e6\u53d1\uff0c\u5982\u4e0b\u6240\u793a\u3002<strong><mark style=\"background-color:rgba(0, 0, 0, 0)\" class=\"has-inline-color has-accent-1-color\">\u6ce8\u610f\uff1a\u8bbe\u5b9a\u81ea\u52a8\u91cd\u88c5\u8f7d\u503c\u65f6\uff0c\u9700\u8981\u540c\u6b65\u66f4\u65b0 TIMER_CHxCV \u5bc4\u5b58\u5668\u7684\u503c\uff0c\u4f7f\u5f97\u8f93\u51fa\u7684 PWM \u4fdd\u6301 50% \u7684\u5360\u7a7a\u6bd4\u3002<\/mark><\/strong><\/p>\n\n\n\n<pre class=\"wp-block-code\"><code lang=\"c\" class=\"language-c\">#include \"gd32f30x_conf.h\"\n\n\/\/\u7a7a\u6307\u9488\u5b9a\u4e49\n#ifndef NULL\n  #define NULL 0\n#endif\n\n\/\/\u901a\u9053\u6570\u91cf\n#define ADC_CH_LEN 1024\n\n\/\/ADC \u6570\u636e\u7f13\u51b2\u533a\uff0c\u7531 DMA \u81ea\u52a8\u642c\u8fd0\nstatic unsigned short s_arrADCBuf[ADC_CH_LEN] = {0};\nstatic unsigned char s_iADCFlag = {0};\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a InitADC0\n* \u51fd\u6570\u529f\u80fd\uff1a \u521d\u59cb\u5316 ADC0\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a void\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nvoid InitADC0(void)\n{\n  \/\/DMA \u521d\u59cb\u5316\u7ed3\u6784\u4f53\n  dma_parameter_struct dma_init_struct;\n  \n  \/\/\u5b9a\u65f6\u5668\u521d\u59cb\u5316\u7ed3\u6784\u4f53\n  timer_oc_parameter_struct timer_ocintpara;\n  timer_parameter_struct timer_initpara;\n  \n  \/\/DMA \u914d\u7f6e\n  rcu_periph_clock_enable(RCU_DMA0);                           \/\/\u4f7f\u80fd DMA0 \u65f6\u949f\n  dma_deinit(DMA0, DMA_CH0);                                   \/\/\u521d\u59cb\u5316\u7ed3\u6784\u4f53\u8bbe\u7f6e\u9ed8\u8ba4\u503c\n  dma_init_struct.direction  = DMA_PERIPHERAL_TO_MEMORY;       \/\/\u8bbe\u7f6e\u6570\u636e\u4f20\u8f93\u65b9\u5411\n  dma_init_struct.memory_addr  = (uint32_t)s_arrADCBuf;        \/\/\u5185\u5b58\u5730\u5740\u8bbe\u7f6e\n  dma_init_struct.memory_inc   = DMA_MEMORY_INCREASE_ENABLE;   \/\/\u5185\u5b58\u589e\u957f\u4f7f\u80fd\n  dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT;       \/\/\u5185\u5b58\u6570\u636e\u4f4d\u6570\u8bbe\u7f6e\n  dma_init_struct.number       = ADC_CH_LEN;                   \/\/\u5185\u5b58\u6570\u636e\u91cf\u8bbe\u7f6e\n  dma_init_struct.periph_addr  = (uint32_t)&amp;(ADC_RDATA(ADC0)); \/\/\u5916\u8bbe\u5730\u5740\u8bbe\u7f6e\n  dma_init_struct.periph_inc   = DMA_PERIPH_INCREASE_DISABLE;  \/\/\u5916\u8bbe\u5730\u5740\u589e\u957f\u5931\u80fd\n  dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;   \/\/\u5916\u8bbe\u6570\u636e\u4f4d\u6570\u8bbe\u7f6e\n  dma_init_struct.priority   = DMA_PRIORITY_ULTRA_HIGH;        \/\/\u4f18\u5148\u7ea7\u8bbe\u7f6e\n  dma_init(DMA0, DMA_CH0, &amp;dma_init_struct);                   \/\/\u521d\u59cb\u5316\u7ed3\u6784\u4f53\n  dma_circulation_disable(DMA0, DMA_CH0);                      \/\/\u5173\u95ed\u5faa\u73af\n  dma_memory_to_memory_disable(DMA0, DMA_CH0);                 \/\/\u7981\u7528\u5185\u5b58\u5230\u5185\u5b58\n  nvic_irq_enable(DMA0_Channel0_IRQn, 2, 2);                   \/\/\u4f7f\u80fd DMA0 \u901a\u9053 0 \u7684 NVIC\n  dma_interrupt_enable(DMA0, DMA_CH0, DMA_INT_FTF);            \/\/\u5f00\u542f\u63a5\u6536\u5b8c\u6210\u4e2d\u65ad\n  dma_channel_enable(DMA0, DMA_CH0);                           \/\/\u4f7f\u80fd DMA\n  \n  \/\/\u914d\u7f6e TIMER0\n  rcu_periph_clock_enable(RCU_TIMER0);\n  timer_deinit(TIMER0);\n  timer_struct_para_init(&amp;timer_initpara);                                          \/\/\u521d\u59cb\u5316 timer_initpara\n  timer_initpara.prescaler         = 119;                                           \/\/\u8bbe\u7f6e\u9884\u5206\u9891\n  timer_initpara.alignedmode       = TIMER_COUNTER_EDGE;                            \/\/\u8bbe\u7f6e\u5bf9\u9f50\u6a21\u5f0f\n  timer_initpara.counterdirection  = TIMER_COUNTER_UP;                              \/\/\u8bbe\u7f6e\u8ba1\u6570\u6a21\u5f0f\n  timer_initpara.period            = 99;                                            \/\/\u8bbe\u7f6e\u91cd\u88c5\u8f7d\u503c\n  timer_initpara.clockdivision     = TIMER_CKDIV_DIV1;                              \/\/\u8bbe\u7f6e\u65f6\u949f\u5206\u5272\n  timer_init(TIMER0, &amp;timer_initpara);                                              \/\/\u521d\u59cb\u5316\u7ed3\u6784\u4f53\n  timer_ocintpara.ocpolarity  = TIMER_OC_POLARITY_LOW;                              \/\/\u901a\u9053\u8f93\u51fa\u6781\u6027\u8bbe\u7f6e\n  timer_ocintpara.outputstate = TIMER_CCX_ENABLE;                                   \/\/\u901a\u9053\u8f93\u51fa\u72b6\u6001\u8bbe\u7f6e\n  timer_channel_output_config(TIMER0, TIMER_CH_0, &amp;timer_ocintpara);                \/\/\u901a\u9053\u8f93\u51fa\u521d\u59cb\u5316\n  timer_channel_output_pulse_value_config(TIMER0, TIMER_CH_0, 49);                  \/\/\u8bbe\u7f6e 50% \u5360\u7a7a\u6bd4\n  timer_channel_output_mode_config(TIMER0, TIMER_CH_0, TIMER_OC_MODE_PWM1);         \/\/\u901a\u9053\u8f93\u51fa\u6a21\u5f0f\u914d\u7f6e\n  timer_channel_output_shadow_config(TIMER0, TIMER_CH_0, TIMER_OC_SHADOW_DISABLE);  \/\/\u5931\u80fd\u6bd4\u8f83\u5f71\u5b50\u5bc4\u5b58\u5668\n  timer_auto_reload_shadow_enable(TIMER0);                                          \/\/\u81ea\u52a8\u91cd\u8f7d\u5f71\u5b50\u4f7f\u80fd\n  timer_primary_output_config(TIMER0, ENABLE);                                      \/\/TIMER0 \u4f7f\u80fd\n\n  \/\/GPIO \u914d\u7f6e\n  rcu_periph_clock_enable(RCU_GPIOA);\n  gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_0);\n\n  \/\/\u914d\u7f6e ADC0\n  rcu_periph_clock_enable(RCU_ADC0);                                                             \/\/\u4f7f\u80fd ADC0 \u7684\u65f6\u949f\n  adc_deinit(ADC0);                                                                              \/\/\u590d\u4f4d ADC0\n  rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV8);                                                   \/\/\u914d\u7f6e ADC \u65f6\u949f\u6e90\n  adc_mode_config(ADC_MODE_FREE);                                                                \/\/\u6240\u6709 ADC \u72ec\u7acb\u5de5\u4f5c\n  adc_special_function_config(ADC0, ADC_SCAN_MODE, ENABLE);                                      \/\/\u4f7f\u80fd ADC \u626b\u63cf\uff0c\u5373\u5f00\u542f\u591a\u901a\u9053\u8f6c\u6362\n  adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, DISABLE);                               \/\/\u5173\u95ed\u8fde\u7eed\u91c7\u6837\n  adc_resolution_config(ADC0, ADC_RESOLUTION_12B);                                               \/\/\u89c4\u5219\u7ec4\u914d\u7f6e\uff0c12 \u4f4d\u5206\u8fa8\u7387\n  adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);                                          \/\/\u53f3\u5bf9\u9f50\n  adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, 1);                                       \/\/\u89c4\u5219\u7ec4\u957f\u5ea6\uff0c\u5373 ADC \u901a\u9053\u6570\u91cf\n  adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);                                \/\/\u89c4\u5219\u7ec4\u4f7f\u80fd\u5916\u90e8\u89e6\u53d1\n  adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_EXTTRIG_REGULAR_T0_CH0);  \/\/\u89c4\u5219\u7ec4\u4f7f\u7528 TIMER0 \u89e6\u53d1\n  adc_oversample_mode_disable(ADC0);                                                             \/\/\u7981\u7528\u8fc7\u91c7\u6837\n  adc_dma_mode_enable(ADC0);                                                                     \/\/\u4f7f\u80fd DMA\n\n  \/\/\u914d\u7f6e\u901a\u9053\u91c7\u6837\u987a\u5e8f\uff0c\u91c7\u6837\u987a\u5e8f\u4ece 0 \u5f00\u59cb\n  \/\/ADC \u8f6c\u6362\u7387\uff1a(239.5 + 12.5) \/ (120MHz \/ 8) = 16.8us\n  adc_regular_channel_config(ADC0, 0, ADC_CHANNEL_0, ADC_SAMPLETIME_239POINT5);\n\n  \/\/ADC0 \u4f7f\u80fd\n  adc_enable(ADC0);\n\n  \/\/\u4f7f\u80fd ADC0 \u6821\u51c6\n  adc_calibration_enable(ADC0);\n  \n  \/\/\u5f00\u59cb\u8f6c\u6362\n  timer_enable(TIMER0);\n}\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a DMA0_Channel0_IRQHandler\n* \u51fd\u6570\u529f\u80fd\uff1a DMA0 \u901a\u9053 0 \u4e2d\u65ad\u670d\u52a1\u51fd\u6570\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a void\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a\n**********************************************************************************************************\/\nvoid DMA0_Channel0_IRQHandler(void)\n{  \n  \/\/\u6e05\u9664\u4e2d\u65ad\u6807\u5fd7\u4f4d\n  dma_interrupt_flag_clear(DMA0, DMA_CH0, DMA_INT_FLAG_FTF);\n  \n  \/\/\u6807\u8bb0\u5df2\u7ecf\u63a5\u6536\u5230\u4e00\u6279\u6570\u636e\n  s_iADCFlag = 1;\n}\n\n\/*********************************************************************************************************\n* \u51fd\u6570\u540d\u79f0\uff1a ADC0ReadCH0\n* \u51fd\u6570\u529f\u80fd\uff1a \u8bfb\u53d6 ADC0 \u901a\u9053 0 \u8f6c\u6362\u7ed3\u679c\n* \u8f93\u5165\u53c2\u6570\uff1a void\n* \u8f93\u51fa\u53c2\u6570\uff1a void\n* \u8fd4 \u56de \u503c\uff1a NULL\uff1a\u6570\u636e\u63a5\u6536\u5c1a\u672a\u5b8c\u6210\uff0c\u5176\u5b83\uff1aADC \u6570\u636e\u7f13\u51b2\u533a\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\n* \u6ce8  \u610f\uff1a \u5fc5\u987b\u8981\u91cd\u65b0\u521d\u59cb\u5316\u624d\u80fd\u89e6\u53d1\u4e0b\u4e00\u6b21\u8f6c\u6362\n**********************************************************************************************************\/\nunsigned short* ADC0ReadCH0(void)\n{\n  if(0 == s_iADCFlag)\n  {\n    return NULL;\n  }\n  s_iADCFlag = 0;\n  return s_arrADCBuf;\n}<\/code><\/pre>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"%E5%AE%9A%E6%97%B6%E5%99%A8%E9%A9%B1%E5%8A%A8_DMA%E9%AB%98%E9%80%9F%E9%87%87%E9%9B%86\"><\/span>\u5b9a\u65f6\u5668\u9a71\u52a8 DMA+\u9ad8\u901f\u91c7\u96c6<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>\u53e6\u5916\uff0c\u6211\u4eec\u8fd8\u53ef\u4ee5\u7528\u5b9a\u65f6\u5668\u9a71\u52a8 DMA \u8f6c\u6362\u5b9e\u73b0 ADC \u9ad8\u901f\u91c7\u6837\u3002\u6b64\u65f6 ADC \u4f7f\u7528\u8f6f\u4ef6\u89e6\u53d1\u5373\u53ef\uff0c\u5e76\u4e14\u5f00\u542f\u8fde\u7eed\u8f6c\u6362\u6a21\u5f0f\u3002\u5229\u7528\u5b9a\u65f6\u5668\u7684\u66f4\u65b0\u4e8b\u4ef6\uff0c\u4ee5\u4e00\u5b9a\u9891\u7387\u89e6\u53d1 DMA \u4f20\u8f93\uff0c\u5c06 ADC \u8f6c\u6362\u7ed3\u679c\u4fdd\u5b58\u5230\u5185\u5b58\u4e2d\u3002\u5b9e\u73b0\u4ee3\u7801\u5982\u4e0b\u6240\u793a\u3002<\/p>\n\n\n\n<pre class=\"wp-block-code\"><code lang=\"c\" class=\"language-c\">#include \"gd32f30x_conf.h\"\n\n\/\/\u7a7a\u6307\u9488\u5b9a\u4e49\r\n#ifndef NULL\r\n  #define NULL 0\r\n#endif\r\n\r\n\/\/\u901a\u9053\u91c7\u6837\u6570\u91cf\r\n#define ADC_CH_LEN 1024\r\n\r\n\/\/ADC \u6570\u636e\u7f13\u51b2\u533a\uff0c\u7531 DMA \u81ea\u52a8\u642c\u8fd0\r\nstatic unsigned short s_arrADCBuf[ADC_CH_LEN] = {0};\r\nstatic unsigned char s_iADCFlag = {0};\r\n\r\n\/*********************************************************************************************************\r\n* \u51fd\u6570\u540d\u79f0\uff1a InitADC0\r\n* \u51fd\u6570\u529f\u80fd\uff1a \u521d\u59cb\u5316 ADC0\r\n* \u8f93\u5165\u53c2\u6570\uff1a void\r\n* \u8f93\u51fa\u53c2\u6570\uff1a void\r\n* \u8fd4 \u56de \u503c\uff1a void\r\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\r\n* \u6ce8  \u610f\uff1a\r\n**********************************************************************************************************\/\r\nvoid InitADC0(void)\r\n{\r\n  \/\/\u5c40\u90e8\u53d8\u91cf\r\n  dma_parameter_struct dma_init_struct;  \/\/DMA \u521d\u59cb\u5316\u7ed3\u6784\u4f53\r\n  timer_parameter_struct timer_initpara; \/\/\u5b9a\u65f6\u5668\u521d\u59cb\u5316\u7ed3\u6784\u4f53\r\n  \r\n  \/\/\u914d\u7f6e TIMER1\r\n  rcu_periph_clock_enable(RCU_TIMER1);                            \/\/\u4f7f\u80fd TIMER1 \u7684\u65f6\u949f\r\n  timer_deinit(TIMER1);                                           \/\/\u8bbe\u7f6e TIMER1 \u53c2\u6570\u6062\u590d\u9ed8\u8ba4\u503c\r\n  timer_struct_para_init(&amp;timer_initpara);                        \/\/\u521d\u59cb\u5316 timer_initpara\r\n  timer_initpara.prescaler         = 119;                         \/\/\u8bbe\u7f6e\u9884\u5206\u9891\u5668\u503c\uff0c1MHz\r\n  timer_initpara.counterdirection  = TIMER_COUNTER_UP;            \/\/\u8bbe\u7f6e\u5411\u4e0a\u8ba1\u6570\u6a21\u5f0f\r\n  timer_initpara.period            = 99;                          \/\/\u8bbe\u7f6e\u81ea\u52a8\u91cd\u88c5\u8f7d\u503c\r\n  timer_initpara.clockdivision     = TIMER_CKDIV_DIV1;            \/\/\u8bbe\u7f6e\u65f6\u949f\u5206\u5272\r\n  timer_init(TIMER1, &amp;timer_initpara);                            \/\/\u6839\u636e\u53c2\u6570\u521d\u59cb\u5316\u5b9a\u65f6\u5668\r\n  timer_enable(TIMER1);                                           \/\/\u4f7f\u80fd\u5b9a\u65f6\u5668\r\n  timer_dma_enable(TIMER1, TIMER_DMA_UPD);                        \/\/\u5b9a\u65f6\u5668\u66f4\u65b0\u4e8b\u4ef6\u4f5c\u4e3a DMA \u89e6\u53d1\u6e90\r\n  \r\n  \/\/DMA \u914d\u7f6e\r\n  rcu_periph_clock_enable(RCU_DMA0);                           \/\/\u4f7f\u80fd DMA0 \u65f6\u949f\r\n  dma_deinit(DMA0, DMA_CH1);                                   \/\/\u521d\u59cb\u5316\u7ed3\u6784\u4f53\u8bbe\u7f6e\u9ed8\u8ba4\u503c\r\n  dma_init_struct.direction  = DMA_PERIPHERAL_TO_MEMORY;       \/\/\u8bbe\u7f6e\u6570\u636e\u4f20\u8f93\u65b9\u5411\r\n  dma_init_struct.memory_addr  = (uint32_t)s_arrADCBuf;        \/\/\u5185\u5b58\u5730\u5740\u8bbe\u7f6e\r\n  dma_init_struct.memory_inc   = DMA_MEMORY_INCREASE_ENABLE;   \/\/\u5185\u5b58\u589e\u957f\u4f7f\u80fd\r\n  dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT;       \/\/\u5185\u5b58\u6570\u636e\u4f4d\u6570\u8bbe\u7f6e\r\n  dma_init_struct.number       = ADC_CH_LEN;                   \/\/\u5185\u5b58\u6570\u636e\u91cf\u8bbe\u7f6e\r\n  dma_init_struct.periph_addr  = (uint32_t)&amp;(ADC_RDATA(ADC0)); \/\/\u5916\u8bbe\u5730\u5740\u8bbe\u7f6e\r\n  dma_init_struct.periph_inc   = DMA_PERIPH_INCREASE_DISABLE;  \/\/\u5916\u8bbe\u5730\u5740\u589e\u957f\u5931\u80fd\r\n  dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;   \/\/\u5916\u8bbe\u6570\u636e\u4f4d\u6570\u8bbe\u7f6e\r\n  dma_init_struct.priority   = DMA_PRIORITY_ULTRA_HIGH;        \/\/\u4f18\u5148\u7ea7\u8bbe\u7f6e\r\n  dma_init(DMA0, DMA_CH1, &amp;dma_init_struct);                   \/\/\u521d\u59cb\u5316\u7ed3\u6784\u4f53\r\n  dma_circulation_disable(DMA0, DMA_CH1);                      \/\/\u5173\u95ed\u5faa\u73af\r\n  dma_memory_to_memory_disable(DMA0, DMA_CH1);                 \/\/\u7981\u7528\u5185\u5b58\u5230\u5185\u5b58\r\n  nvic_irq_enable(DMA0_Channel1_IRQn, 2, 2);                   \/\/\u4f7f\u80fd DMA0 \u901a\u9053 1 \u7684 NVIC\r\n  dma_interrupt_enable(DMA0, DMA_CH1, DMA_INT_FTF);            \/\/\u5f00\u542f\u63a5\u6536\u5b8c\u6210\u4e2d\u65ad\r\n  dma_channel_enable(DMA0, DMA_CH1);                           \/\/\u4f7f\u80fd DMA\r\n\r\n  \/\/GPIO \u914d\u7f6e\r\n  rcu_periph_clock_enable(RCU_GPIOA);\r\n  gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_0);\r\n\r\n  \/\/\u914d\u7f6e ADC0\r\n  rcu_periph_clock_enable(RCU_ADC0);                                                             \/\/\u4f7f\u80fd ADC0 \u7684\u65f6\u949f\r\n  adc_deinit(ADC0);                                                                              \/\/\u590d\u4f4d ADC0\r\n  rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV8);                                                   \/\/\u914d\u7f6e ADC \u65f6\u949f\u6e90\r\n  adc_mode_config(ADC_MODE_FREE);                                                                \/\/\u6240\u6709 ADC \u72ec\u7acb\u5de5\u4f5c\r\n  adc_special_function_config(ADC0, ADC_SCAN_MODE, ENABLE);                                      \/\/\u4f7f\u80fd ADC \u626b\u63cf\uff0c\u5373\u5f00\u542f\u591a\u901a\u9053\u8f6c\u6362\r\n  adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, ENABLE);                                \/\/\u4f7f\u80fd\u8fde\u7eed\u91c7\u6837\r\n  adc_resolution_config(ADC0, ADC_RESOLUTION_12B);                                               \/\/\u89c4\u5219\u7ec4\u914d\u7f6e\uff0c12 \u4f4d\u5206\u8fa8\u7387\r\n  adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);                                          \/\/\u53f3\u5bf9\u9f50\r\n  adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, 1);                                       \/\/\u89c4\u5219\u7ec4\u957f\u5ea6\uff0c\u5373 ADC \u901a\u9053\u6570\u91cf\r\n  adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);                                \/\/\u89c4\u5219\u7ec4\u4f7f\u80fd\u5916\u90e8\u89e6\u53d1\r\n  adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE);  \/\/\u89c4\u5219\u7ec4\u4f7f\u7528\u8f6f\u4ef6\u89e6\u53d1\r\n  adc_oversample_mode_disable(ADC0);                                                             \/\/\u7981\u7528\u8fc7\u91c7\u6837\r\n  adc_dma_mode_enable(ADC0);                                                                     \/\/\u4f7f\u80fd DMA\r\n\r\n  \/\/\u914d\u7f6e\u901a\u9053\u91c7\u6837\u987a\u5e8f\uff0c\u91c7\u6837\u987a\u5e8f\u4ece 0 \u5f00\u59cb\r\n  \/\/ADC \u8f6c\u6362\u7387\uff1a(239.5 + 12.5) \/ (120MHz \/ 8) = 16.8us\r\n  adc_regular_channel_config(ADC0, 0, ADC_CHANNEL_0, ADC_SAMPLETIME_239POINT5);\r\n\r\n  \/\/ADC0 \u4f7f\u80fd\r\n  adc_enable(ADC0);\r\n\r\n  \/\/\u4f7f\u80fd ADC0 \u6821\u51c6\r\n  adc_calibration_enable(ADC0);\r\n  \r\n  \/\/\u89c4\u5219\u7ec4\u8f6f\u4ef6\u89e6\u53d1\r\n  adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL);\r\n  \r\n  \/\/\u5f00\u59cb\u8f6c\u6362\r\n  timer_enable(TIMER1);\r\n}\r\n\r\n\/*********************************************************************************************************\r\n* \u51fd\u6570\u540d\u79f0\uff1a DMA0_Channel1_IRQHandler\r\n* \u51fd\u6570\u529f\u80fd\uff1a DMA0 \u901a\u9053 1 \u4e2d\u65ad\u670d\u52a1\u51fd\u6570\r\n* \u8f93\u5165\u53c2\u6570\uff1a void\r\n* \u8f93\u51fa\u53c2\u6570\uff1a void\r\n* \u8fd4 \u56de \u503c\uff1a void\r\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\r\n* \u6ce8  \u610f\uff1a\r\n**********************************************************************************************************\/\r\nvoid DMA0_Channel1_IRQHandler(void)\r\n{  \r\n  \/\/\u6e05\u9664\u4e2d\u65ad\u6807\u5fd7\u4f4d\r\n  dma_interrupt_flag_clear(DMA0, DMA_CH1, DMA_INT_FLAG_FTF);\r\n  \r\n  \/\/\u6807\u8bb0\u5df2\u7ecf\u63a5\u6536\u5230\u4e00\u6279\u6570\u636e\r\n  s_iADCFlag = 1;\r\n}\r\n\r\n\/*********************************************************************************************************\r\n* \u51fd\u6570\u540d\u79f0\uff1a ADC0ReadCH0\r\n* \u51fd\u6570\u529f\u80fd\uff1a \u8bfb\u53d6 ADC0 \u901a\u9053 0 \u8f6c\u6362\u7ed3\u679c\r\n* \u8f93\u5165\u53c2\u6570\uff1a void\r\n* \u8f93\u51fa\u53c2\u6570\uff1a void\r\n* \u8fd4 \u56de \u503c\uff1a NULL\uff1a\u6570\u636e\u63a5\u6536\u5c1a\u672a\u5b8c\u6210\uff0c\u5176\u5b83\uff1aADC \u6570\u636e\u7f13\u51b2\u533a\r\n* \u521b\u5efa\u65e5\u671f\uff1a 2023\u5e7409\u670826\u65e5\r\n* \u6ce8  \u610f\uff1a \u5fc5\u987b\u8981\u91cd\u65b0\u521d\u59cb\u5316\u624d\u80fd\u89e6\u53d1\u4e0b\u4e00\u6b21\u8f6c\u6362\r\n**********************************************************************************************************\/\r\nunsigned short* ADC0ReadCH0(void)\r\n{\r\n  if(0 == s_iADCFlag)\r\n  {\r\n    return NULL;\r\n  }\r\n  s_iADCFlag = 0;\r\n  return s_arrADCBuf;\r\n}<\/code><\/pre>\n","protected":false},"excerpt":{"rendered":"<p>\u8bb0\u5f55 STM32 \u548c GD32 \u4e2d ADC \u7684\u5b66\u4e60\u7b14\u8bb0\u548c\u5fc3\u5f97\u3002\u672c\u6587\u4e2d\u4e3b\u8981\u89e3\u6790 ADC \u7684\u89c4\u5219\u8f6c\u6362\uff0c\u4e0d\u6d89\u53ca\u6ce8\u5165\u8f6c\u6362\u3002<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[10,5],"tags":[],"_links":{"self":[{"href":"https:\/\/www.huangrongzhen.ink\/index.php?rest_route=\/wp\/v2\/posts\/1980"}],"collection":[{"href":"https:\/\/www.huangrongzhen.ink\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.huangrongzhen.ink\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.huangrongzhen.ink\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.huangrongzhen.ink\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=1980"}],"version-history":[{"count":31,"href":"https:\/\/www.huangrongzhen.ink\/index.php?rest_route=\/wp\/v2\/posts\/1980\/revisions"}],"predecessor-version":[{"id":2032,"href":"https:\/\/www.huangrongzhen.ink\/index.php?rest_route=\/wp\/v2\/posts\/1980\/revisions\/2032"}],"wp:attachment":[{"href":"https:\/\/www.huangrongzhen.ink\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=1980"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.huangrongzhen.ink\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=1980"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.huangrongzhen.ink\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=1980"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}